9783031006388-3031006380-Efficient Processing of Deep Neural Networks (Synthesis Lectures on Computer Architecture)

Efficient Processing of Deep Neural Networks (Synthesis Lectures on Computer Architecture)

ISBN-13: 9783031006388
ISBN-10: 3031006380
Edition: 1
Author: Vivienne Sze, Yu-Hsin Chen, Tien-Ju Yang, Joel S. Emer
Publication date: 2020
Publisher: Springer
Format: Paperback 356 pages
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Book details

ISBN-13: 9783031006388
ISBN-10: 3031006380
Edition: 1
Author: Vivienne Sze, Yu-Hsin Chen, Tien-Ju Yang, Joel S. Emer
Publication date: 2020
Publisher: Springer
Format: Paperback 356 pages

Summary

Efficient Processing of Deep Neural Networks (Synthesis Lectures on Computer Architecture) (ISBN-13: 9783031006388 and ISBN-10: 3031006380), written by authors Vivienne Sze, Yu-Hsin Chen, Tien-Ju Yang, Joel S. Emer, was published by Springer in 2020. With an overall rating of 3.9 stars, it's a notable title among other AI & Machine Learning (Design & Architecture, Hardware & DIY, Computer Science) books. You can easily purchase or rent Efficient Processing of Deep Neural Networks (Synthesis Lectures on Computer Architecture) (Paperback) from BooksRun, along with many other new and used AI & Machine Learning books and textbooks. And, if you're looking to sell your copy, our current buyback offer is $2.24.

Description

This book provides a structured treatment of the key principles and techniques for enabling efficient processing of deep neural networks (DNNs). DNNs are currently widely used for many artificial intelligence (AI) applications, including computer vision, speech recognition, and robotics. While DNNs deliver state-of-the-art accuracy on many AI tasks, it comes at the cost of high computational complexity. Therefore, techniques that enable efficient processing of deep neural networks to improve key metrics--such as energy-efficiency, throughput, and latency--without sacrificing accuracy or increasing hardware costs are critical to enabling the wide deployment of DNNs in AI systems.

The book includes background on DNN processing; a description and taxonomy of hardware architectural approaches for designing DNN accelerators; key metrics for evaluating and comparing different designs; features of DNN processing that are amenable to hardware/algorithm co-design to improve energy efficiency and throughput; and opportunities for applying new technologies. Readers will find a structured introduction to the field as well as formalization and organization of key concepts from contemporary work that provide insights that may spark new ideas.

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